Cmos light sensor and operation method thereof

ABSTRACT

A CMOS light sensor and the operation method thereof are disclosed. The CMOS light sensor has a plurality of light sensing lines and a plurality of capacitor lines. Each light sensing line has a plurality of light sensors such that the number of capacitors in each capacitor line is smaller than the number of light sensing cells in each light sensing line. The capacitors are used for holding a portion of the potentials produced by the light sensing cells due to illumination. The method of operating the CMOS light sensor includes transferring the data captured by the light sensing line to the capacitor line and reading out the data according to a pre-defined order so that the leakage of charges from the capacitor is reduced.

CROSS REFERENCE TO RELATED APPLICATIONS

The present application is a continuation of U.S. Ser. No. 10/249,402,filed Apr. 7, 2003, the specification of which is hereby incorporatedherein in its entirety. The present application and said U.S.application Ser. No. 10/249,402, claim the priority benefit of TaiwanApplication Serial No. 91116948, filed Jul. 30, 2002, the specificationof which is hereby incorporated herein in its entirety.

BACKGROUND OF THE INVENTION

1. Field of Invention

The present invention relates to a CMOS light sensor and the operationmethod thereof. More particularly, the present invention relates to aCMOS light sensor and operation method that uses segment processing.

2. Description of Related Art

Most light sensors are classified into two major types, a charge-coupleddevice (CCD) or a CMOS light sensor. In a conventional CCD sensor, eachlight sensing line is assigned a group of shift registers for holdingthe charges produced by the CCD sensing line. In general, the amount ofcharges produced by the CCD sensor depends on the strength ofillumination. Once the charges are fully transferred to the shiftregisters, the charges are sequentially shifted away from the shiftregisters to the circuit in the next processing stage. Similarly, asshown in FIG. 1, each CMOS light sensor 10 has a plurality of lightsensing lines (12 a, 14 a and 16 a) and each has a functional elementsimilar to the shift register in the charge couple device. However,instead of shift registers, these functional elements are capacitors.

The structure of the CMOS light sensor 10 and the conventional CCDsensor are almost identical except the deployment of a capacitor in theformer instead of a shift register. Hence, the method of operating theCMOS light sensor 10 is very similar to the method of operating the CCDsensor. The CMOS sensor 10 is exposed to light so that the sensing cells(such as 120 a, 122 a, 140 a, 142 a, 160 a and 162 a) in the lightsensing lines (12 a, 14 a and 16 a) generate an amount of electriccharges in proportional to the intensity of illumination. Thereafter,various sensor cells (such as 120 a, 122 a, 136 a and 138 a) within thesame light sensing line (such as 12 a) are sampled individually toreproduce a corresponding electric potential. The capacitors within theaforementioned capacitor line (such as 12 b) are actually storage devicefor registering the sampled electric potential.

In general, the capacitor line registers the resultant electricpotentials produced by the entire light sensing line all at once but theelectric potentials within the capacitor line are read out sequentially.Therefore, time to read out all of the potentials within the capacitorline increases with the number of sensor cells in a light sensing line.Since charge leakage occurs on most capacitors, the total number ofcharges drained away from the capacitor increases with time. If too manycharges leak away from the capacitor, the actual stored data (electricpotential) may be seriously distorted.

SUMMARY OF INVENTION

Accordingly, one object of the present invention is to provide a CMOSlight sensor and operation method thereof. The CMOS light sensor has acapacitor line with a count of capacitors smaller than the count oflight sensing cells in a light sensing line. Hence, all the dataproduced by the light sensing line can be read out in a few readingoperations. Ultimately, data retaining period of data within eachcapacitor is shortened considerably when compared with a conventionaltechnique.

To achieve these and other advantages and in accordance with the purposeof the invention, as embodied and broadly described herein, theinvention provides a CMOS light sensor. The CMOS light sensor has alight sensing line and a capacitor line. The light sensing line has aplurality of light sensing cells. The count of capacitors in thecapacitor line is smaller than the count of light sensing cells in thelight sensing line. The capacitors along the capacitor line store up aportion of the potentials produced by the light sensing cells along thelight sensing line.

This invention also provides an alternative CMOS light sensor. The CMOSlight sensor has a plurality of light sensing lines and a group ofcapacitor lines. Each light sensing line has a plurality of lightsensing cells and each group of capacitor lines has at least onecapacitor line. The count of capacitors in each capacitor line issmaller than the count of light sensing cells in each light sensingline. Furthermore, the potentials produced by the light sensing cells ineach light sensing line is transferred in sequence to the capacitorlines in the capacitor line group.

This invention also provides a method of operating a CMOS light sensor.A portion of the light sensing cells in the CMOS light sensor isilluminated to produce a corresponding set of electric charges.Thereafter, the set of unprocessed charges produced by the illuminatedlight sensing cells is converted into a set of corresponding potentialsand transferred to the capacitors on a capacitor line. Finally, thepotentials stored in the capacitors of the capacitor line are read out.

In one embodiment of this invention, the CMOS light sensor has aplurality of capacitor lines. When the stored potentials inside one ofthe capacitor lines is read, a set of unprocessed charges produced bythe illuminated light sensing cells is converted into a set ofcorresponding potentials and transferred to any of the capacitor linesother than the one involved in the reading operation. The potentials inthese other capacitor lines are subsequently read according to apre-defined sequence.

In brief, this invention uses a capacitor line having a count ofcapacitors smaller than the count of light sensing cells in a lightsensing line. Therefore, the time for reading out all the potentialsfrom the capacitors along a capacitor line is shortened. Withconsiderably reduction in reading time, the amount of charges leakingout from each capacitor is minimized and hence the degree of datadistortion is reduced considerably.

It is to be understood that both the foregoing general description andthe following detailed description are exemplary, and are intended toprovide further explanation of the invention as claimed.

BRIEF DESCRIPTION OF DRAWINGS

The accompanying drawings are included to provide a furtherunderstanding of the invention, and are incorporated in and constitute apart of this specification. The drawings illustrate embodiments of theinvention and, together with the description, serve to explain theprinciples of the invention. In the drawings,

FIG. 1 is a schematic diagram showing the relationship between the lightsensing lines and the capacitor lines in a conventional CMOS lightsensor;

FIG. 2 is a schematic diagram showing the relationship between the lightsensing lines and the capacitor lines in a linear CMOS light sensoraccording to one preferred embodiment of this invention;

FIG. 3 is a schematic diagram showing the relationship between the lightsensing lines and the capacitor lines in a staggered CMOS light sensoraccording to a first preferred embodiment of this invention;

FIG. 4 is a schematic diagram showing the relationship between the lightsensing lines and the capacitor lines in a staggered CMOS light sensoraccording to a second preferred embodiment of this invention;

FIG. 5 is a schematic diagram showing the relationship between the lightsensing lines and the capacitor lines in a staggered CMOS light sensoraccording to a third preferred embodiment of this invention;

FIG. 6 is a timing diagram showing the operating sequence of a CMOSlight sensor system having a single capacitor line and at least onelight sensing line therein according to one preferred embodiment of thisinvention;

FIG. 7A is a schematic diagram showing a CMOS light sensor system havinga multiple of capacitor lines that correspond to a single light sensingline according to one preferred embodiment of this invention; and

FIG. 7B is a timing diagram showing the operating sequence of the CMOSlight sensor system in FIG. 7A.

DETAILED DESCRIPTION

Reference will now be made in detail to the present preferredembodiments of the invention, examples of which are illustrated in theaccompanying drawings. Wherever possible, the same reference numbers areused in the drawings and the description to refer to the same or likeparts.

FIG. 2 is a schematic diagram showing the relationship between the lightsensing lines and the capacitor lines in a linear CMOS light sensoraccording to one preferred embodiment of this invention. As shown inFIG. 2, the CMOS light sensor 20 includes three light sensing lines 22a, 24 a, 26 a for sensing the three primary colors red (R), green (G)and blue (B) respectively. In addition, the CMOS light sensor 20 alsoincludes three capacitor lines 22 b, 24 b, 26 b for holding potentialsproduced by the respective light sensing lines 22 a, 24 a and 26 a. Theoperational relationship between the three light sensing lines 22 a, 24a, 26 a and the three corresponding capacitor lines 22 b, 24 b, 26 b areidentical. Hence, the operation of only one group of light sensing lineand corresponding capacitor line is explained in the following.

In this embodiment, the number of capacitors 221 b.about.225 b in the :capacitor line 22 b is set to one third of the number of light sensingcells 221 a.about.235 a along the light sensing line 22 a. Obviously,the ratio of the number of light sensing cells to the number ofcapacitors can be varied according to actual application. Since thetotal number of capacitors 221 b.about.225 b in the capacitor line 22 bis only one third that of the number of light sensing cells 221a.about.235 a, data must be extracted in stages from the light sensingcells 221 a.about.235 a. The following is a more detailed description ofthe operation relationship between the light sensing line 22 a and thecapacitor line 22 b.

Since the number of capacitors 221 b.about.225 b is only one third ofthe amount of the light sensing cells 221 a.about.235 a, the potentialsproduced by the light sensing cells 221 a.about.235 a must betransferred into the capacitor line step by step. Because the potentialwithin the sensing cells 221 a.about.235 a are transferred to thecapacitor line 22 b in three separate steps, sectional illumination ofthe CMOS light sensor is preferable. In other words, the light sensingcells 221 a.about.225 a are illuminated first followed by the lightsensing cells 226 a.about.230 a and then the light sensing cells 231a.about.235 a or some other arrangements for these three segments oflight sensing cells. Obviously, an alternative arrangement such asilluminating the light sensing cells 221 a.about.235 a all at once andshifting the resulting potentials into the capacitor line 22 b insequence is also possible. However, this will increase overall leakageof charges from the sensing cells 221 a.about.235 a and lead to agreater data distortion. Whether the CMOS light sensor is illuminatedonce or in a multiple of exposures, once a set of charges is producedinside the light sensing cells 221 a.about.235 a within the lightsensing line 22 a, the set of charges are converted into electricpotentials and stored inside the capacitor line 22 b. Thereafter, eachpotential inside the capacitor line is sequentially read to obtain therequired image data.

FIGS. 3, 4, 5 are schematic diagrams showing the relationship betweenthe light sensing lines and the capacitor lines in a staggered CMOSlight sensor according to this invention. In FIGS. 3 and 4, only one ofthe three groups (including the capacitor line that corresponds to thelight sensing line) of light sensing lines (R, G, B) is shown. Since theremaining two groups of light sensing lines are identical with the oneshown in the Figures, their structures are not drawn. In FIG. 3, a lightsensing line 32 a is used to capture the intensity of a particular colorin the odd pixels of a scan line while another light sensing line 34 ais used to capture the intensity of the same color in the even pixels ofthe scan line. The capacitor lines 32 b and 34 b are used to hold thepotentials after converting the charges that result from the intensityof illumination of the particular color on the light sensing lines 32 aand 34 a. In FIG. 4, both light sensing lines 42 and 44 correspond withone capacitor line 46. In other words, the capacitor line 46 not onlystores the resultant potentials captured by the light sensing line 44,but also stores the resultant potentials captured by the light sensingline 42 as well.

In the embodiment of FIG. 5, two capacitor lines 56 and 58 are utilizedby light sensing lines 52 r and 54 r used for sensing red color, lightsensing lines 52 g and 54 g used for sensing green color and lightsensing lines 52 b and 54 b used for sensing blue color. For example,the capacitor line 56 may serve as a storage area for holding thepotentials of odd pixels captured by the light sensing lines 52 r, 52 gand 52 b for various colors. Similarly, the capacitor line 58 may serveas a storage area for holding the potentials of even pixels captured bythe light sensing lines 54 r, 54 g and 54 b for various colors. If thenumber of capacitors in the capacitor line 56 is one-third the number oflight sensing cells in a single light sensing line (52 r, 52 g or 52 b),all the potentials captured by the light sensing lines 52 r, 52 g and 52b must be read nine readout operations. Under the same token, all thepotentials captured by the light sensing lines .54 r, 54 g and 54 b mustbe read in nine readout operations. Obviously, this is not the onlyarrangement for the light sensing lines and the capacitor lines. Personsskilled in the art may change the arrangement to produce optimalresults.

After explaining a few light sensing line capacitor line configurations,methods of operating the CMOS light sensor are described below. FIG. 6is a timing diagram showing the operating sequence of a CMOS lightsensor system which has a single capacitor line and at least one lightsensing line therein. The light sensing line 22 a and the capacitor line22 b shown in FIG. 2 are used as an example for illustrating the timingdiagram in FIG. 6. The clocking signal CK_1 in FIG. 6 is a signal forcontrolling the light sensing line 22 a and the capacitor line 22 b.When the clocking signal CK_1 is at high potential, potentials capturedby the light sensing line 22 a are transferred to the capacitors in thecapacitor line 22 b. As the clocking signal CK_1 drops to low potential,the potentials stored inside the capacitors are sequentially read outfrom the capacitor line 22 b. With this type of timing control,potentials resulted from illuminating the light sensing line 22 a areread out in three separate sessions, namely, session one for readingdata 602, session two for reading data 604 and session three for readingdata 606. Although this is an arrangement capable of saving a fewcapacitors in a CMOS light sensor, each data reading session must bepunctuated by an idling period t.sub.1. This idling period t.sub.1 isrequired for transferring the electric potential from the light sensingline 22 a to the capacitor line 22 b. Obviously, the aforementionedarrangement implies that the entire light sensing line 22 a isilluminated all at once and then the generated potentials aretransferred in separate sessions. If the light sensing line 22 a isilluminated in several stages, an exposure time period must also beadded to the idling time t.sub.1.

To reduce idling time caused by non-successive data transmission, thisinvention also provides a CMOS light sensor having a plurality ofcapacitor lines that correspond to a light sensing line. FIG. 7A is aschematic diagram showing a CMOS light sensor system having a multipleof capacitor lines that correspond to a single light sensing lineaccording to one preferred embodiment of this invention. Since the lightsensing lines and corresponding capacitor lines for each primary colorare the same, only a group that includes a light sensing line 70 and apair of capacitor lines 73 and 75 is illustrated in detail. Thepotentials gathered by the light sensing line 70 due to illumination aretransferred to the capacitor lines 73 and 75. In this embodiment, thenumber of capacitors within the capacitor lines 73 and 75 is one-fourththe number of light sensing cells in the light sensing line 70. However,persons skilled in the art may arrange the relative number of capacitorsand light sensing cells in any ratio that can optimize overallperformance.

FIG. 7B is a timing diagram showing the operating sequence of the CMOSlight sensor system in FIG. 7A. In FIG. 7B, a clocking signal CK_2 isused for controlling the capacitor line 73 and a portion of the lightsensing line 70 and another clocking signal CK_3 is used for controllingthe capacitor line 75 and another portion of the light sensing line 70.For example, when the clocking signal CK_2 is at high potential, thepotentials gathered by the light sensing cells 701.about.705 or711.about.715 (as shown in FIG. 7A) due to exposure are transferred tothe capacitor line 73. When the clocking signal CK_2 drops back to lowpotential, the potential values are sequentially read from the capacitorline 73 via the end-stage circuit 74. Similarly, when the clockingsignal CK_3 is at high potential, the potentials gathered by the lightsensing cells 706.about.710 or 716.about.720 (as shown in FIG. 7A) dueto exposure are transferred to the capacitor line 75. When the clockingsignal CK_3 drops back to low potential, the potential values aresequentially read from the capacitor line 75 via the end-stage circuit74. With this arrangement, as long as a proper data length is selected,the data 760, 772, 762, 774 and 764 are linked together to form acontinuous data stream. Ultimately, the type of interruption caused bytransferring data using a single capacitor line can be avoided.

In summary, this invention provides a means to reduce the time forreading out data stored inside the capacitor line. Hence, the effectcharge leakage from the capacitors is greatly minimized. In addition,this invention also provides a structure that uses a plurality ofcapacitor lines which correspond with a light sensing line and a methodof operating this structure. Consequently, very little time is wastedbetween data transmission and overall operating efficiency of the CMOSlight sensor is improved.

It will be apparent to those skilled in the art that variousmodifications and variations can be made to the structure of the presentinvention without departing from the scope or spirit of the invention.In view of the foregoing, it is intended that the present inventioncover modifications and variations of this invention provided they fallwithin the scope of the following claims and their equivalents.

1-15. (canceled)
 16. A CMOS light sensor, comprising: a plurality oflight sensing lines having a quantity of light sensing cells; one ormore capacitor lines having a quantity of capacitors, wherein saidquantity of capacitors is less than the quantity of the light sensingcells, wherein potentials captured by the light sensing cells toillumination are able to be transferred to the capacitor lines forstorage in a sequential order; and wherein at least one of the lightsensing lines is capable of sensing red light, at least one of the lightsensing lines is capable of sensing green light, and at least one of thelight sensing lines is capable of sensing blue light.
 17. The CMOSsensor of claim 16 wherein at least two of the light sensing lines arecapable of sensing red light, wherein one of said red sensing lines iscapable of sensing even pixels of a scan line and the other of said redsensing lines is capable of sensing odd pixels of the scan line; whereinat least two of the light sensing lines are capable of sensing greenlight, wherein one of said green sensing lines is capable of sensingeven pixels of a scan line and the other of said green sensing lines iscapable of sensing odd pixels of the scan line; and wherein at least twoof the light sensing lines are capable of sensing blue light, whereinone of said red sensing lines is capable of sensing even pixels of ascan line and the other of said blue sensing lines is capable of sensingodd pixels of the scan line.
 18. A CMOS light sensor, comprising: atleast one light sensing line having a quantity of light sensing cells;at least one capacitor line having a quantity of capacitors, wherein thequantity of light sensing cells is more than the quantity of capacitors;wherein the quantity of light sensing cells compared to the quantity ofcapacitors comprises a ratio, n; wherein the capacitor line is capableof holding potentials captured by the light sensing cells due to anillumination of the CMOS light sensor; and wherein the CMOS light senoris capable of transferring the potentials from the light sensing line tothe capacitor line in n sequential steps.
 19. The CMOS light sensor ofclaim 18, wherein n comprises approximately one third.
 20. The CMOSlight sensor of claim 18 further comprising a plurality of light sensinglines.
 21. The CMOS light sensor of claim 18 further comprising aplurality of capacitor lines.
 22. The CMOS light sensor of claim 18wherein the CMOS light sensor is capable of illuminating the lightsensing cells sequentially, and wherein the CMOS light sensor is capableof transferring the potentials to the capacitor line sequentially aseach light sensing cell is illuminated.
 23. The CMOS light sensor ofclaim 18 wherein the CMOS light sensor is capable of reading out thepotentials from the capacitor line.
 24. The CMOS light sensor of claim23 wherein the CMOS light sensor is capable of reading out thepotentials from the capacitor line sequentially.
 25. A CMOS lightsensor, comprising: at least one light sensing line having a quantity oflight sensing cells; at least one capacitor line having a quantity ofcapacitors, wherein the quantity of light sensing cells is more than thequantity of capacitors; wherein the capacitor line is capable of holdingpotentials captured by the light sensing cells due to an illumination ofthe CMOS light sensor; and wherein the CMOS light sensor is capable oftransferring the potentials from the lights sensing line to thecapacitor line in n sequential steps, wherein n is based upon thequantity of light sensing cells compared to the quantity of capacitors.26. The CMOS light sensor of claim 25 further comprising a plurality oflight sensing lines.
 27. The CMOS light sensor of claim 25 furthercomprising a plurality of capacitor lines.
 28. The CMOS light sensor ofclaim 25 wherein the CMOS light sensor is capable of illuminating thelight sensing cells sequentially, and wherein the CMOS light sensor iscapable of transferring the potentials to the capacitor linesequentially as each light sensing cell is illuminated.
 29. The CMOSlight sensor of claim 28 wherein the CMOS light sensor is capable ofilluminating the light sensing cells sequentially in n steps.
 30. TheCMOS light sensor of claim 25 wherein the CMOS light sensor is capableof reading out the potentials from the capacitor line.
 31. The CMOSlight sensor of claim 30 wherein the CMOS light sensor is capable ofreading out the potentials from the capacitor line sequentially.
 32. ACMOS light sensor, comprising: at least one light sensing line having aquantity of light sensing cells; and at least one capacitor line havinga quantity of capacitors, wherein the quantity of capacitors is smallerthan the quantity of light sensing cells, and the capacitor line iscapable of holding potentials captured by the light sensing cells of thelight sensing line due to one or more illuminations of the CMOS lightsensor.
 33. The CMOS light sensor of claim 32 further comprising atleast one light sensing line capable of sensing red light, at least onelight sensing line capable of sensing green light and at least one lightsensing line capable of sensing blue light.
 34. The CMOS light sensor ofclaim 32 further comprising at least two light sensing lines capable ofsensing red light wherein said first red sensing line is capable ofsensing even pixels of a scan line and said second red sensing line iscapable of sensing odd pixels of the scan line.
 35. The CMOS lightsensor of claim 34 further comprising at least two capacitor lines,wherein the CMOS light sensor is capable of transferring potentials fromsaid first red sensing line to said first capacitor line and thepotentials from said second red sensing line to said second capacitorline.
 36. The CMOS light sensor of claim 32 further comprising at leasttwo light sensing lines capable of sensing green light wherein saidfirst green sensing line is capable of sensing even pixels of a scanline and said second green sensing line is capable of sensing odd pixelsof the scan line.
 37. The CMOS light sensor of claim 36 furthercomprising at least two capacitor lines, wherein the CMOS light sensoris capable of transferring potentials from said first green sensing lineto said first capacitor line and the potentials from said second greensensing line to said second capacitor line.
 38. The CMOS light sensor ofclaim 32 further comprising at least two light sensing lines capable ofsensing blue light wherein said first blue sensing line is capable ofsensing even pixels of a scan line and said second blue sensing line iscapable of sensing odd pixels of the scan line.
 39. The CMOS lightsensor of claim 38 further comprising at least two capacitor lines,wherein the CMOS light sensor is capable of transferring potentials fromsaid first blue sensing line to said first capacitor line and thepotentials from said second blue sensing line to said second capacitorline.
 40. The CMOS light sensor of claim 32 wherein the quantity oflight sensing cells compared to the quantity of capacitors comprises aratio, n; and wherein the capacitor line is capable of extracting saidpotentials in n sequential steps.
 41. The CMOS light sensor of claim 32wherein each said capacitor line is capable of extracting saidpotentials from more than one light sensing line.
 42. The CMOS lightsensor of claim 32 wherein the capacitor line is capable of sequentiallyextracting said potentials from said light sensing cells.
 43. The CMOSlight sensor of claim 32 further comprising a plurality of light sensinglines and a plurality of capacitor lines.
 44. The CMOS light sensor ofclaim 40 wherein each said capacitor line is associated with one lightsensing line and is capable of extracting the potentials from itsassociated light sensing line.
 45. The CMOS light sensor of claim 43wherein each said capacitor line is associated with more than one saidline sensing line and is capable of extracting the potentials from itsassociated light sensing lines.
 46. The CMOS light sensor of claim 43wherein at least one said light sensing line is capable of sensing evenpixels of a scan line and at least one light sensing line is capable ofsensing odd pixels of the scan line.
 47. The CMOS light sensor of claim32 wherein the CMOS light sensor is capable of sequentially illuminatingthe light sensing cells and wherein the capacitor line is capable ofextracting the potentials sequentially as each light sensing cell isilluminated.
 48. The CMOS light sensor of claim 32 wherein said CMOSlight sensor is capable of reading out the potentials stored in thecapacitors.
 49. The CMOS light sensor of claim 48 wherein said CMOSlight sensor is capable of reading out the potentials sequentially. 50.The CMOS light sensor of claim 32 wherein said capacitor line is capableof extracting the potentials in response to a clocking signal forcontrolling the light sensing cells and the capacitors being at a highpotential; and wherein said CMOS light sensor is capable of sequentiallyreading out the potentials from the capacitor line when said clockingsignal is at a low potential.
 51. The CMOS light sensor of claim 43wherein each said light sensing line is associated with more than onecapacitor line that is capable of extracting the potentials from itsassociated light sensing line; wherein a first said capacitor line iscapable of extracting the potentials in response to a clocking signalfor controlling the light sensing cells and the capacitors being at ahigh potential; wherein said CMOS light sensor is capable ofsequentially reading out the potentials from the first capacitor linewhen said clocking signal is at a low potential; wherein a second saidcapacitor line is capable of extracting the potentials in response to aclocking signal for controlling the light sensing cells and thecapacitors being at a low potential; and wherein said CMOS light sensoris capable of sequentially reading out the potentials from the secondcapacitor line when said clocking signal is at a high potential.
 52. Amethod of operating a CMOS light sensor having a quantity of lightsensing cells and a quantity of capacitors that are capable of receivingpotentials captured by the light sensing cells due to one or moreilluminations of the CMOS light sensor, wherein the quantity of lightsensing cells is greater than the quantity of capacitors, comprising:illuminating one or more of the light sensing cells; producingunprocessed charges with the one or more illuminated light sensingcells; converting at least a portion of the unprocessed charges tocorresponding electric potentials; transferring the potentials to one ormore capacitors; and repeating said converting and said transferringuntil all or nearly all illuminated light sensing cells are processed.53. The method of claim 52 further comprising transferring thepotentials sequentially.
 54. The method of claim 53 further comprisingtransferring the potentials sequentially in n steps, wherein n comprisesthe ratio of light sensing cells to capacitors.
 55. The method of claim53 further comprising transferring the potentials sequentially in nsteps, wherein n is based upon the quantity of capacitors compared tothe quantity of light sensing cells.
 56. The method of claim 52 furthercomprising illuminating said light sensing cells sequentially andtransferring said potentials sequentially as each light sensing cell isilluminated.
 57. The method of claim 52 further comprising illuminatingthe light sensing cells more than one time before all or nearly allilluminated light sensing cells are processed.
 58. The method of claim52 further comprising storing the transferred electric potentials in thecapacitors.
 59. The method of claim 52 further comprising reading outthe electric potentials from the capacitors.
 60. The method of claim 52further comprising reading out the electric potentials from thecapacitors sequentially.
 61. The method of claim 52 further comprisingilluminating all of said light sensing cells substantiallysimultaneously.
 62. The method of claim 52 further comprising sensingeven pixels of a scan line with a first light sensing cell and sensingodd pixels of the scan line with a second light sensing cell.
 63. Themethod of claim 52 further comprising sensing red light with a firstlight sensing cell, sensing green light with a second light sensingcell, and sensing blue light with a third light sensing cell.
 64. Themethod of claim 52 further comprising: sensing red light with at leasttwo light sensing cells, wherein the first of said two red sensing cellssenses even pixels of a scan line and the second of said two red sensingcells senses odd pixels of the scan line; sensing green light with atleast two other light sensing cells, wherein the first of said two greensensing cells senses even pixels of a scan line and the second of saidtwo green sensing cells senses odd pixels of the scan line; and sensingblue light with at least two further light sensing cells, wherein thefirst of said two blue sensing cells senses even pixels of a scan lineand the second of said two blue sensing cells senses odd pixels of thescan line.
 65. The method of claim 52 wherein the light sensing cellscomprise one or more light sensing lines and the capacitors comprise oneor more capacitor lines.
 66. The method of claim 65 wherein the lightsensing cells comprise a plurality of light sensing lines.
 67. Themethod of claim 65 wherein the capacitors comprise a plurality ofcapacitor lines.
 68. The method of claim 59, wherein the capacitors inthe CMOS light sensor comprise a plurality of capacitor lines, furthercomprising: converting the unprocessed charges produced by the exposedlight sensing cells into corresponding electric potentials andtransferring the potentials to one of the capacitor lines other than afirst capacitor line while the first capacitor line is undergoing saidreading out; and reading out the potentials stored within the capacitorlines other than the first capacitor line while the first capacitor lineis undergoing said transferring.
 69. The method of claim 59, furthercomprising: illuminating a second group of one or more light sensingcells; and in response to illuminating said second group to produceunprocessed charges with the second group of illuminated light sensingcells, repeating said converting, said transferring and said readingout.
 70. The method of claim 59 further comprising: transferring thepotentials to one or more capacitors in response to a clocking signalfor controlling the light sensing cells and the capacitors being at ahigh potential; and sequentially reading out the potentials from thecapacitors when said clocking signal is at a low potential.
 71. Themethod of claim 59, wherein the light sensing cells comprise at leastone light sensing line and the capacitors comprise more than onecapacitor line, the method further comprising: transferring thepotentials to a first capacitor line in response to a clocking signalfor controlling the light sensing line and the capacitor lines being ata high potential; sequentially reading out the potentials from the firstcapacitor line in response to said clocking signal being at a lowpotential; transferring the potentials to a second capacitor line inresponse to the clocking signal being at a low potential; andsequentially reading out the potentials from the second capacitor linein response to said clocking signal being at a high potential.
 72. ACMOS light sensor having a quantity of light sensing cells and aquantity of capacitors that are capable of receiving potentials capturedby the light sensing cells due to one or more illuminations of the CMOSlight sensor, wherein the quantity of light sensing cells is greaterthan the quantity of capacitors, comprising: means for illuminating oneor more of the light sensing cells; means for producing unprocessedcharges with the one or more illuminated light sensing cells; means forconverting at least a portion of the unprocessed charges tocorresponding electric potentials; means for transferring the potentialsto one or more capacitors; and means for repeating said converting andsaid transferring until all or nearly all illuminated light sensingcells are processed.
 73. The CMOS light sensor of claim 72 furthercomprising means for transferring the potentials sequentially.
 74. TheCMOS light sensor of claim 73 further comprising means for transferringthe potentials sequentially in n steps, wherein n comprises the ratio oflight sensing cells to capacitors.
 75. The CMOS light sensor of claim 73further comprising means for transferring the potentials sequentially inn steps, wherein n is based upon the quantity of capacitors compared tothe quantity of light sensing cells.
 76. The CMOS light sensor of claim72 further comprising means for illuminating said light sensing cellssequentially and means for transferring said potentials sequentially aseach light sensing cell is illuminated.
 77. The CMOS light sensor ofclaim 72 further comprising means for illuminating the light sensingcells more than one time before all or nearly all illuminated lightsensing cells are processed.
 78. The CMOS light sensor of claim 72further comprising means for storing the transferred electric potentialsin the capacitors.
 79. The CMOS light sensor of claim 72 furthercomprising means for reading out the electric potentials from thecapacitors.
 80. The CMOS light sensor of claim 72 further comprisingmeans for reading out the electric potentials from the capacitorssequentially.
 81. The CMOS light sensor of claim 72 further comprisingmeans for illuminating all of said light sensing cells substantiallysimultaneously.
 82. The CMOS light sensor of claim 72 further comprisingmeans for sensing even pixels of a scan line with a first light sensingcell and means for sensing odd pixels of the scan line with a secondlight sensing cell.
 83. The CMOS light sensor of claim 72 furthercomprising means for sensing red light with at least a first lightsensing cell, means for sensing green light with at least a second lightsensing cell, and means for sensing blue light with at least a thirdlight sensing cell.
 84. The CMOS light sensor of claim 72 furthercomprising: means for sensing red light with at least two light sensingcells having means for sensing even pixels of a scan line with one ofsaid two red sensing cells and means for sensing odd pixels of the scanline with the other of said two red sensing cells; means for sensinggreen light with at least two light sensing cells having means forsensing even pixels of a scan line with one of said two green sensingcells and means for sensing odd pixels of the scan line with the otherof said two green sensing cells; and means for sensing blue light withat least two light sensing cells having means for sensing even pixels ofa scan line with one of said two blue sensing cells and means forsensing odd pixels of the scan line with the other of said two bluesensing cells.
 85. The CMOS light sensor of claim 72 wherein the lightsensing cells comprise one or more light sensing lines and thecapacitors comprise one or more capacitor lines.
 86. The CMOS lightsensor of claim 85 wherein the light sensing cells comprise a pluralityof light sensing lines.
 87. The CMOS light sensor of claim 85 whereinthe capacitors comprise a plurality of capacitor lines.
 88. The CMOSlight sensor of claim 79, wherein the capacitors in the CMOS lightsensor comprise a plurality of capacitor lines, further comprising:means for converting the unprocessed charges produced by the exposedlight sensing cells into corresponding electric potentials andtransferring the potentials to one of the capacitor lines other than afirst capacitor line while the first capacitor line is undergoing saidreading out; and means for reading out the potentials stored within thecapacitor lines other than the first capacitor line while the firstcapacitor line is undergoing said transferring.
 89. The CMOS lightsensor of claim 79, further comprising: means for illuminating a secondgroup of one or more light sensing cells; and in response toilluminating said second group to produce unprocessed charges with thesecond group of illuminated light sensing cells, means for repeatingsaid converting, said transferring and said reading out.
 90. The CMOSlight sensor of claim 79 further comprising: means for transferring thepotentials to one or more capacitors in response to a clocking signalfor controlling the light sensing cells and the capacitors being at ahigh potential; and means for sequentially reading out the potentialsfrom the capacitors when said clocking signal is at a low potential. 91.The CMOS light sensor of claim 79, wherein the light sensing cellscomprise at least one light sensing line and the capacitors comprisemore than one capacitor line, further comprising: means for transferringthe potentials to a first capacitor line in response to a clockingsignal for controlling the light sensing line and the capacitor linesbeing at a high potential; means for sequentially reading out thepotentials from the first capacitor line in response to said clockingsignal being at a low potential; means for transferring the potentialsto a second capacitor line in response to the clocking signal being at alow potential; and means for sequentially reading out the potentialsfrom the second capacitor line in response to said clocking signal beingat a high potential.